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SourceForge.net. Fast, secure and free downloads from the largest Open Source applications and software directory

TimingTool diagram editor is free to use online. TimingTool application generates VHDL or Verilog test benches from timing diagrams.

TimeGen is a timing diagram software editor that allows engineers to easily create design specifications and timing diagrams.

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SynaptiCAD: EDA supplier for timing diagram editors, simulators, and VHDL and Verilog debug tools.

International Electronic Discussion Forum: EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals

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XESS Corp develops and sells low-cost XILINX programmable logic + microcontroller boards with tutorials.

A discussion forum for electronics and circuits